Computer Organization II : Lectures
The schedule for the lectures is given below. Lectures are designed on the premise that you have studied the given chapters from the text book and slides before the lecture. (Slides are not so good self study material as they have been made for lectures - they will be used as basis for each lecture)
Lectures are in English whenever needed. They are in Finnish if everyone present understands Finnish.
| Date | Topic | Lect Nr | Slides (pdf) | Chapters |
|---|---|---|---|---|
| Tue 2.11.2010 | Administration, Introduction | 00 | co1, bw2, bw6 | |
| Tue 2.11.2010 | Introduction, Digital Logic Combination Circuits | 01 | co1, bw2, bw6 | CO-I, Ch 20.1-3 |
| Thu 4.11.2010 | Digital Logic Sequential Circuits, Buses | 02 | co1, bw2, bw6 | Ch 20.4, Ch 3 |
| Tue 9.11.2010 | Internal Memory, Cache | 03 | co1, bw2, bw6 | Ch 4-5 |
| Thu 11.11.2010 | Virtual Memory, TLB | 04 | co1, bw2, bw6 | Ch 8 |
| Tue 16.11.2010 | Computer Arithmetic | 05 | co1, bw2, bw6 | Ch 9 |
| Thu 18.11.2010 | Instruction Sets | 06 | co1, bw2, bw6 | Ch 10-11 |
| Tue 23.11.2010 | Processor Structure and Function | 07 | co1, bw2, bw6 | Ch 12.1-4 |
| Thu 25.11.2010 | CPU Examples, RISC | 08 | co1, bw2, bw6 | Ch 12.5-6, Ch 13 |
| Tue 30.11.2010 | Instruction Level Parallelism, Superscalar Processors | 09 | co1, bw2, bw6 | Ch 14 |
| Thu 2.12.2010 | Control Unit | 10 | co1, bw2, bw6 | Ch 15-16 |
| Tue 7.12.2010 | Parallel Processing | 11 | co1, bw2, bw6 | Ch 17 |
| Thu 9.12.2010 | Multicore Computers, Summary | 12 | co1, bw2, bw6 | Ch 18 |
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